FPGA Drive UART

[Prohibitive]

FPGA Drive UART
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz, 2 Ch
Genre: eLearning | Language: English | Duration: 12 lectures (1h 59m) | Size: 597.6 MB
analysis, coding, simulation and run on board What you'll learn:

FPGA drive UART

Requirements
Verilog basic knowledge

Description
This course will focus on how FPGA drive UART communication. It will finish one task: send data from computer to FPGA through one USB-to-UART cable, after the FPGA receive the data, it will send the data back and show the data on the computer software. It includes the key knowledge as following:

(1) Edge detection;

(2) UART protocol analysis;

(3) UART protocol code in verilog;

(4) UART protocol simulation in Modelsim;

(5) FPGA drive UART system analysis and coding;

(6) Virtual Device coding and simulation skill;

Who this course is for
People who are interested in FPGA

Download

http://nitroflare.com/view/6EF974FE38D03EC/FPGA_Drive_UART.rar

or
http://rapidgator.net/file/33ee107bdd0e72e7e5c212679dd6328d/FPGA_Drive_UART.rar.html