Coursera - VLSI CAD Logic to Layout (University of Illinois)

[yanfan001]

Coursera - VLSI CAD: Logic to Layout (University of Illinois)
WEBRip | English | MP4 | 960 x 540 | AVC ~63.6 kbps | 29.970 fps
AAC | 128 Kbps | 44.1 KHz | 2 channels | Subs: English (.srt) | ~17 hours | 1.33 GB
Genre: eLearning Video / Computer Engineering, CAD

A modern VLSI chip has a zillion parts - logic, control, memory, interconnect, etc. How do we design these complex chips? Answer: CAD software tools. Learn how to build these tools in this class.

Content:

01 Orientation
02 Welcome and Introduction Week 1
03 Computational Boolean Algebra Week 1
04 BDDs SAT Week 2
05 2-Level Synthesis Algebraic Division Week 3
06 Multilevel Factor Extract Dont Cares Week 4
07 ASIC Placement Week 5
08 Technology Mapping Week 6
09 ASIC Routing Week 7
10 Timing Analysis Week 8
11 Tools

General
Complete name : 07_8.4-_Logic_Synthesis_-_Controllability_Dont_Cares_19-59.mp4
Format : MPEG-4
Format profile : Base Media
Codec ID : isom
File size : 28.7 MiB
Duration : 19mn 59s
Overall bit rate : 201 Kbps
Writing application : Lavf55.10.100

Video
ID : 1
Format : AVC
Format/Info : Advanced Video Codec
Format profile : [email protected]
Format settings, CABAC : Yes
Format settings, ReFrames : 4 frames
Codec ID : avc1
Codec ID/Info : Advanced Video Coding
Duration : 19mn 59s
Bit rate : 63.6 Kbps
Width : 960 pixels
Height : 540 pixels
Display aspect ratio : 16:9
Frame rate mode : Constant
Frame rate : 29.970 fps
Color space : YUV
Chroma subsampling : 4:2:0
Bit depth : 8 bits
Scan type : Progressive
Bits/(Pixel*Frame) : 0.004
Stream size : 9.09 MiB (32%)
Writing library : x264 core 129 r2230 1cffe9f
Encoding settings : cabac=1 / ref=3 / deblock=1:0:0 / analyse=0x1:0x111 / me=hex / subme=7 / psy=1 / psy_rd=1.00:0.00 / mixed_ref=1 / me_range=16 / chroma_me=1 / trellis=1 / 8x8dct=0 / cqm=0 / deadzone=21,11 / fast_pskip=1 / chroma_qp_offset=-2 / threads=12 / lookahead_threads=2 / sliced_threads=0 / nr=0 / decimate=1 / interlaced=0 / bluray_compat=0 / constrained_intra=0 / bframes=3 / b_pyramid=2 / b_adapt=1 / b_bias=0 / direct=1 / weightb=1 / open_gop=0 / weightp=2 / keyint=250 / keyint_min=25 / scenecut=40 / intra_refresh=0 / rc_lookahead=40 / rc=crf / mbtree=1 / crf=28.0 / qcomp=0.60 / qpmin=0 / qpmax=69 / qpstep=4 / ip_ratio=1.40 / aq=1:1.00

Audio
ID : 2
Format : AAC
Format/Info : Advanced Audio Codec
Format profile : LC
Codec ID : 40
Duration : 19mn 59s
Bit rate mode : Constant
Bit rate : 128 Kbps
Channel(s) : 2 channels
Channel positions : Front: L R
Sampling rate : 44.1 KHz
Compression mode : Lossy
Delay relative to video : -800ms
Stream size : 18.4 MiB (64%)

Screenshots

Download link:

uploadgig_com:
https://uploadgig.com/file/download/e4ff90c28c4627E7/6h955.Coursera..VLSI.CAD.Logic.to.Layout.University.of.Illinois.part1.rar
https://uploadgig.com/file/download/5806989fBBA86292/6h955.Coursera..VLSI.CAD.Logic.to.Layout.University.of.Illinois.part2.rar
https://uploadgig.com/file/download/e4b6a802634aD141/6h955.Coursera..VLSI.CAD.Logic.to.Layout.University.of.Illinois.part3.rar
https://uploadgig.com/file/download/7aE826bF4945fa15/6h955.Coursera..VLSI.CAD.Logic.to.Layout.University.of.Illinois.part4.rar
https://uploadgig.com/file/download/9CBf762c177B5243/6h955.Coursera..VLSI.CAD.Logic.to.Layout.University.of.Illinois.part5.rar
https://uploadgig.com/file/download/b9aB1333650f46B2/6h955.Coursera..VLSI.CAD.Logic.to.Layout.University.of.Illinois.part6.rar

rapidgator_net:
https://rapidgator.net/file/4e54d43811d1853d121cfe160b2b752f/6h955.Coursera..VLSI.CAD.Logic.to.Layout.University.of.Illinois.part1.rar.html
https://rapidgator.net/file/396414e87d7efc31f2fca0e417def830/6h955.Coursera..VLSI.CAD.Logic.to.Layout.University.of.Illinois.part2.rar.html
https://rapidgator.net/file/3b219a461dd7785964ed52edc22e199b/6h955.Coursera..VLSI.CAD.Logic.to.Layout.University.of.Illinois.part3.rar.html
https://rapidgator.net/file/ad55b3b5afd7b4a231551aef02bd673a/6h955.Coursera..VLSI.CAD.Logic.to.Layout.University.of.Illinois.part4.rar.html
https://rapidgator.net/file/54ba11cfb82201aa3f0da5a4f331da9d/6h955.Coursera..VLSI.CAD.Logic.to.Layout.University.of.Illinois.part5.rar.html
https://rapidgator.net/file/19d47d64662da5e85b73bedc20ce8f25/6h955.Coursera..VLSI.CAD.Logic.to.Layout.University.of.Illinois.part6.rar.html

nitroflare_com:
http://nitroflare.com/view/8AA1B26B8AFFD62/6h955.Coursera..VLSI.CAD.Logic.to.Layout.University.of.Illinois.part1.rar
http://nitroflare.com/view/F7ECA863B61A803/6h955.Coursera..VLSI.CAD.Logic.to.Layout.University.of.Illinois.part2.rar
http://nitroflare.com/view/222191F5F784F10/6h955.Coursera..VLSI.CAD.Logic.to.Layout.University.of.Illinois.part3.rar
http://nitroflare.com/view/9D1116987D4C682/6h955.Coursera..VLSI.CAD.Logic.to.Layout.University.of.Illinois.part4.rar
http://nitroflare.com/view/E668D01AAFBEEF8/6h955.Coursera..VLSI.CAD.Logic.to.Layout.University.of.Illinois.part5.rar
http://nitroflare.com/view/652DE4C6AC4AE6D/6h955.Coursera..VLSI.CAD.Logic.to.Layout.University.of.Illinois.part6.rar

Links are Interchangeable - No Password - Single Extraction